26 lines
947 B
XML
26 lines
947 B
XML
<?xml version="1.0" encoding="UTF-8"?>
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<project name="HDMI" board="Mojo" language="Verilog" version="2">
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<files>
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<src>hdmi_encoder.luc</src>
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<src top="true">mojo_top.v</src>
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<component>uart_rx.luc</component>
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<src>sram.v</src>
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<component>fifo_2x_reducer.luc</component>
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<component>dvi_globals.luc</component>
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<component>avr_interface.luc</component>
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<component>dvi_encoder.luc</component>
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<component>spi_slave.luc</component>
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<component>uart_tx.luc</component>
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<component>serdes_n_to_1.luc</component>
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<component>simple_dual_ram.v</component>
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<component>async_fifo.luc</component>
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<component>cclk_detector.luc</component>
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<component>tmds_encoder.luc</component>
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<constraint lib="true">mojo.ucf</constraint>
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<constraint lib="true">hdmi.ucf</constraint>
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<core name="clk_wiz_v3_6">
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<src>..\clk_wiz_v3_6.v</src>
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</core>
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</files>
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</project>
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