set out_dir ./.build
set part_num xc7a35tftg256-1

set_part $part_num

file delete -force $out_dir/ip/clk_wiz_0

create_project -in_memory

create_ip -name clk_wiz -vendor xilinx.com -library ip \
	-version 6.0 -module_name clk_wiz_0 \
	-dir ${out_dir}/ip

set_property -dict [list \
	CONFIG.PRIMARY_PORT {clk_in} \
	CONFIG.CLKOUT2_USED {true} \
	CONFIG.CLKOUT3_USED {true} \
	CONFIG.CLKOUT4_USED {true} \
	CONFIG.CLK_OUT1_PORT {clk_dvi} \
	CONFIG.CLK_OUT2_PORT {clk_dvin} \
	CONFIG.CLK_OUT3_PORT {clk_pix} \
	CONFIG.CLK_OUT4_PORT {clk_mcu} \
	CONFIG.CLKOUT1_REQUESTED_OUT_FREQ {375} \
	CONFIG.CLKOUT2_REQUESTED_OUT_FREQ {375} \
	CONFIG.CLKOUT2_REQUESTED_PHASE {180} \
	CONFIG.CLKOUT3_REQUESTED_OUT_FREQ {75} \
	CONFIG.CLKOUT4_REQUESTED_OUT_FREQ {150} \
	CONFIG.CLKOUT1_DRIVES {BUFG} \
	CONFIG.FEEDBACK_SOURCE {FDBK_AUTO} \
	CONFIG.MMCM_DIVCLK_DIVIDE {1} \
	CONFIG.MMCM_CLKFBOUT_MULT_F {7.500} \
	CONFIG.MMCM_CLKOUT0_DIVIDE_F {2.000} \
	CONFIG.MMCM_CLKOUT1_DIVIDE {2} \
	CONFIG.MMCM_CLKOUT1_PHASE {180.000} \
	CONFIG.MMCM_CLKOUT2_DIVIDE {10} \
	CONFIG.MMCM_CLKOUT3_DIVIDE {5} \
	CONFIG.NUM_OUT_CLKS {4} \
	CONFIG.CLKOUT1_JITTER {111.604} \
	CONFIG.CLKOUT1_PHASE_ERROR {116.405} \
	CONFIG.CLKOUT2_JITTER {111.604} \
	CONFIG.CLKOUT2_PHASE_ERROR {116.405} \
	CONFIG.CLKOUT3_JITTER {152.549} \
	CONFIG.CLKOUT3_PHASE_ERROR {116.405} \
	CONFIG.CLKOUT4_JITTER {132.464} \
	CONFIG.CLKOUT4_PHASE_ERROR {116.405} \
] [get_ips clk_wiz_0]

generate_target all [get_ips]

synth_ip [get_ips] > $out_dir/clk_wiz_0.log