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Removed unnecessary files

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Dreaded_X
2020-09-20 21:12:15 +02:00
parent 0f312b8085
commit 58dd1a72a5
14 changed files with 0 additions and 19077 deletions
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12
ipcore_dir/tmp/_xmsgs/netgen.xmsgs
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<?xml version="1.0" encoding="UTF-8"?>
<!-- IMPORTANT: This is an internal file that has been generated
by the Xilinx ISE software. Any direct editing or
changes made to this file may result in unpredictable
behavior or data corruption. It is strongly advised that
users do not edit the contents of this file. -->
<messages>
<msg type="info" file="NetListWriters" num="633" delta="old" >The generated Verilog netlist contains Xilinx <arg fmt="%s" index="1">UNISIM</arg> simulation primitives and has to be used with <arg fmt="%s" index="2">UNISIM</arg> simulation library for correct compilation and simulation.
</msg>
</messages>

12
ipcore_dir/tmp/_xmsgs/pn_parser.xmsgs
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<?xml version="1.0" encoding="UTF-8"?>
<!-- IMPORTANT: This is an internal file that has been generated -->
<!-- by the Xilinx ISE software. Any direct editing or -->
<!-- changes made to this file may result in unpredictable -->
<!-- behavior or data corruption. It is strongly advised that -->
<!-- users do not edit the contents of this file. -->
<!-- -->
<!-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. -->
<messages>
</messages>

18453
ipcore_dir/tmp/_xmsgs/xst.xmsgs
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1
ipcore_dir/tmp/microblaze_mcs.lso
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