Latest changes

This commit is contained in:
2020-09-19 22:23:51 +02:00
parent 5e1e3bbbcc
commit e8bedf9b14
4 changed files with 35 additions and 26 deletions

View File

@@ -210,6 +210,7 @@ reg write_enable, write_enable_c_q, write_enable_c_d;
wire[7:0] sram_read_data;
sram #(.SIZE(8), .DEPTH(CHAR_HMAX*CHAR_VMAX)) sram(
.clk(hdmi_clk),
.rst(rst),
.read_address(char_index_q),
.write_address(addr_q-1),
.read_data(sram_read_data),
@@ -306,6 +307,7 @@ always @(negedge z80_ioreq) begin
bottom_t = 1;
scroll_t = scroll_q + 1;
end else if ((bottom_q == 1) && ((addr_t >= (scroll_q*CHAR_HMAX)) || (addr_n >= (scroll_q*CHAR_HMAX)) || (addr_r >= (scroll_q*CHAR_HMAX)))) begin
// Reset line
scroll_t = scroll_q + 1;
end
@@ -317,6 +319,7 @@ always @(negedge z80_ioreq) begin
addr_b = addr_b - 1;
end
// @todo If we underflow (-1) we do not end up in the right spot (makes sense)
addr_t = addr_t % (CHAR_HMAX*CHAR_VMAX);
addr_n = addr_n % (CHAR_HMAX*CHAR_VMAX);
addr_r = addr_r % (CHAR_HMAX*CHAR_VMAX);

View File

@@ -1,22 +1,27 @@
module sram #(
parameter SIZE = 1,
parameter DEPTH = 1
)(
input clk,
input [$clog2(DEPTH)-1:0] read_address,
input [$clog2(DEPTH)-1:0] write_address,
output reg [SIZE-1:0] read_data,
input [SIZE-1:0] write_data,
input write_en
);
reg [SIZE-1:0] ram [DEPTH-1:0];
always @(posedge clk) begin
read_data <= ram[read_address];
if (write_en)
ram[write_address] <= write_data;
end
parameter SIZE = 1,
parameter DEPTH = 1
)(
input clk,
input rst,
input [$clog2(DEPTH)-1:0] read_address,
input [$clog2(DEPTH)-1:0] write_address,
output reg [SIZE-1:0] read_data,
input [SIZE-1:0] write_data,
input write_en
);
reg [SIZE-1:0] ram [DEPTH-1:0];
reg [DEPTH-1:0] valid;
always @(posedge clk) begin
read_data <= ram[read_address] * valid[read_address];
if (write_en) begin
valid[write_address] <= 1;
ram[write_address] <= write_data;
end
end
endmodule