48 lines
1.0 KiB
Tcl
48 lines
1.0 KiB
Tcl
cd /home/tim/Projects/fpga/micro_test/test
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if { [xload new test.xmp] != 0 } {
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exit -1
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}
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xset arch spartan6
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xset dev xc6slx9
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xset package tqg144
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xset speedgrade -2
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xset simulator isim
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if { [xset hier sub] != 0 } {
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exit -1
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}
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set bMisMatch false
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set xpsArch [xget arch]
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if { ! [ string equal -nocase $xpsArch "spartan6" ] } {
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set bMisMatch true
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}
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set xpsDev [xget dev]
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if { ! [ string equal -nocase $xpsDev "xc6slx9" ] } {
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set bMisMatch true
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}
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set xpsPkg [xget package]
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if { ! [ string equal -nocase $xpsPkg "tqg144" ] } {
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set bMisMatch true
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}
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set xpsSpd [xget speedgrade]
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if { ! [ string equal -nocase $xpsSpd "-2" ] } {
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set bMisMatch true
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}
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if { $bMisMatch == true } {
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puts "Settings Mismatch:"
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puts "Current Project:"
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puts " Family: spartan6"
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puts " Device: xc6slx9"
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puts " Package: tqg144"
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puts " Speed: -2"
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puts "XPS File: "
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puts " Family: $xpsArch"
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puts " Device: $xpsDev"
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puts " Package: $xpsPkg"
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puts " Speed: $xpsSpd"
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exit 11
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}
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xset hdl verilog
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xset intstyle ise
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save proj
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exit
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