First commit
This commit is contained in:
90
ipcore_dir/hdmi_clk/implement/implement.bat
Executable file
90
ipcore_dir/hdmi_clk/implement/implement.bat
Executable file
@@ -0,0 +1,90 @@
|
||||
REM file: implement.bat
|
||||
REM
|
||||
REM (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved.
|
||||
REM
|
||||
REM This file contains confidential and proprietary information
|
||||
REM of Xilinx, Inc. and is protected under U.S. and
|
||||
REM international copyright and other intellectual property
|
||||
REM laws.
|
||||
REM
|
||||
REM DISCLAIMER
|
||||
REM This disclaimer is not a license and does not grant any
|
||||
REM rights to the materials distributed herewith. Except as
|
||||
REM otherwise provided in a valid license issued to you by
|
||||
REM Xilinx, and to the maximum extent permitted by applicable
|
||||
REM law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
|
||||
REM WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
|
||||
REM AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
|
||||
REM BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
|
||||
REM INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
|
||||
REM (2) Xilinx shall not be liable (whether in contract or tort,
|
||||
REM including negligence, or under any other theory of
|
||||
REM liability) for any loss or damage of any kind or nature
|
||||
REM related to, arising under or in connection with these
|
||||
REM materials, including for any direct, or any indirect,
|
||||
REM special, incidental, or consequential loss or damage
|
||||
REM (including loss of data, profits, goodwill, or any type of
|
||||
REM loss or damage suffered as a result of any action brought
|
||||
REM by a third party) even if such damage or loss was
|
||||
REM reasonably foreseeable or Xilinx had been advised of the
|
||||
REM possibility of the same.
|
||||
REM
|
||||
REM CRITICAL APPLICATIONS
|
||||
REM Xilinx products are not designed or intended to be fail-
|
||||
REM safe, or for use in any application requiring fail-safe
|
||||
REM performance, such as life-support or safety devices or
|
||||
REM systems, Class III medical devices, nuclear facilities,
|
||||
REM applications related to the deployment of airbags, or any
|
||||
REM other applications that could lead to death, personal
|
||||
REM injury, or severe property or environmental damage
|
||||
REM (individually and collectively, "Critical
|
||||
REM Applications"). Customer assumes the sole risk and
|
||||
REM liability of any use of Xilinx products in Critical
|
||||
REM Applications, subject only to applicable laws and
|
||||
REM regulations governing limitations on product liability.
|
||||
REM
|
||||
REM THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
|
||||
REM PART OF THIS FILE AT ALL TIMES.
|
||||
REM
|
||||
|
||||
REM -----------------------------------------------------------------------------
|
||||
REM Script to synthesize and implement the RTL provided for the clocking wizard
|
||||
REM -----------------------------------------------------------------------------
|
||||
|
||||
REM Clean up the results directory
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||||
rmdir /S /Q results
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||||
mkdir results
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||||
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||||
REM Copy unisim_comp.v file to results directory
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copy %XILINX%\verilog\src\iSE\unisim_comp.v .\results\
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REM Synthesize the Verilog Wrapper Files
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echo 'Synthesizing Clocking Wizard design with XST'
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xst -ifn xst.scr
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move hdmi_clk_exdes.ngc results\
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REM Copy the constraints files generated by Coregen
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echo 'Copying files from constraints directory to results directory'
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copy ..\example_design\hdmi_clk_exdes.ucf results\
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cd results
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echo 'Running ngdbuild'
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ngdbuild -uc hdmi_clk_exdes.ucf hdmi_clk_exdes
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echo 'Running map'
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map -timing -pr b hdmi_clk_exdes -o mapped.ncd
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echo 'Running par'
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par -w mapped.ncd routed mapped.pcf
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echo 'Running trce'
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trce -e 10 routed -o routed mapped.pcf
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echo 'Running design through bitgen'
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bitgen -w routed
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echo 'Running netgen to create gate level model for the clocking wizard example design'
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netgen -ofmt verilog -sim -sdf_anno false -tm hdmi_clk_exdes -w routed.ncd routed.v
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cd ..
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91
ipcore_dir/hdmi_clk/implement/implement.sh
Executable file
91
ipcore_dir/hdmi_clk/implement/implement.sh
Executable file
@@ -0,0 +1,91 @@
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||||
#!/bin/sh
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||||
# file: implement.sh
|
||||
#
|
||||
# (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved.
|
||||
#
|
||||
# This file contains confidential and proprietary information
|
||||
# of Xilinx, Inc. and is protected under U.S. and
|
||||
# international copyright and other intellectual property
|
||||
# laws.
|
||||
#
|
||||
# DISCLAIMER
|
||||
# This disclaimer is not a license and does not grant any
|
||||
# rights to the materials distributed herewith. Except as
|
||||
# otherwise provided in a valid license issued to you by
|
||||
# Xilinx, and to the maximum extent permitted by applicable
|
||||
# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
|
||||
# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
|
||||
# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
|
||||
# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
|
||||
# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
|
||||
# (2) Xilinx shall not be liable (whether in contract or tort,
|
||||
# including negligence, or under any other theory of
|
||||
# liability) for any loss or damage of any kind or nature
|
||||
# related to, arising under or in connection with these
|
||||
# materials, including for any direct, or any indirect,
|
||||
# special, incidental, or consequential loss or damage
|
||||
# (including loss of data, profits, goodwill, or any type of
|
||||
# loss or damage suffered as a result of any action brought
|
||||
# by a third party) even if such damage or loss was
|
||||
# reasonably foreseeable or Xilinx had been advised of the
|
||||
# possibility of the same.
|
||||
#
|
||||
# CRITICAL APPLICATIONS
|
||||
# Xilinx products are not designed or intended to be fail-
|
||||
# safe, or for use in any application requiring fail-safe
|
||||
# performance, such as life-support or safety devices or
|
||||
# systems, Class III medical devices, nuclear facilities,
|
||||
# applications related to the deployment of airbags, or any
|
||||
# other applications that could lead to death, personal
|
||||
# injury, or severe property or environmental damage
|
||||
# (individually and collectively, "Critical
|
||||
# Applications"). Customer assumes the sole risk and
|
||||
# liability of any use of Xilinx products in Critical
|
||||
# Applications, subject only to applicable laws and
|
||||
# regulations governing limitations on product liability.
|
||||
#
|
||||
# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
|
||||
# PART OF THIS FILE AT ALL TIMES.
|
||||
#
|
||||
|
||||
#-----------------------------------------------------------------------------
|
||||
# Script to synthesize and implement the RTL provided for the clocking wizard
|
||||
#-----------------------------------------------------------------------------
|
||||
|
||||
# Clean up the results directory
|
||||
rm -rf results
|
||||
mkdir results
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||||
|
||||
# Copy unisim_comp.v file to results directory
|
||||
cp $XILINX/verilog/src/iSE/unisim_comp.v ./results/
|
||||
|
||||
# Synthesize the Verilog Wrapper Files
|
||||
echo 'Synthesizing Clocking Wizard design with XST'
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||||
xst -ifn xst.scr
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||||
mv hdmi_clk_exdes.ngc results/
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||||
|
||||
# Copy the constraints files generated by Coregen
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||||
echo 'Copying files from constraints directory to results directory'
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||||
cp ../example_design/hdmi_clk_exdes.ucf results/
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||||
|
||||
cd results
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||||
|
||||
echo 'Running ngdbuild'
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||||
ngdbuild -uc hdmi_clk_exdes.ucf hdmi_clk_exdes
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||||
|
||||
echo 'Running map'
|
||||
map -timing hdmi_clk_exdes -o mapped.ncd
|
||||
|
||||
echo 'Running par'
|
||||
par -w mapped.ncd routed mapped.pcf
|
||||
|
||||
echo 'Running trce'
|
||||
trce -e 10 routed -o routed mapped.pcf
|
||||
|
||||
echo 'Running design through bitgen'
|
||||
bitgen -w routed
|
||||
|
||||
echo 'Running netgen to create gate level model for the clocking wizard example design'
|
||||
netgen -ofmt verilog -sim -sdf_anno false -tm hdmi_clk_exdes -w routed.ncd routed.v
|
||||
|
||||
cd ..
|
||||
58
ipcore_dir/hdmi_clk/implement/planAhead_ise.bat
Executable file
58
ipcore_dir/hdmi_clk/implement/planAhead_ise.bat
Executable file
@@ -0,0 +1,58 @@
|
||||
REM file: planAhead_ise.bat
|
||||
REM
|
||||
REM (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved.
|
||||
REM
|
||||
REM This file contains confidential and proprietary information
|
||||
REM of Xilinx, Inc. and is protected under U.S. and
|
||||
REM international copyright and other intellectual property
|
||||
REM laws.
|
||||
REM
|
||||
REM DISCLAIMER
|
||||
REM This disclaimer is not a license and does not grant any
|
||||
REM rights to the materials distributed herewith. Except as
|
||||
REM otherwise provided in a valid license issued to you by
|
||||
REM Xilinx, and to the maximum extent permitted by applicable
|
||||
REM law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
|
||||
REM WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
|
||||
REM AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
|
||||
REM BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
|
||||
REM INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
|
||||
REM (2) Xilinx shall not be liable (whether in contract or tort,
|
||||
REM including negligence, or under any other theory of
|
||||
REM liability) for any loss or damage of any kind or nature
|
||||
REM related to, arising under or in connection with these
|
||||
REM materials, including for any direct, or any indirect,
|
||||
REM special, incidental, or consequential loss or damage
|
||||
REM (including loss of data, profits, goodwill, or any type of
|
||||
REM loss or damage suffered as a result of any action brought
|
||||
REM by a third party) even if such damage or loss was
|
||||
REM reasonably foreseeable or Xilinx had been advised of the
|
||||
REM possibility of the same.
|
||||
REM
|
||||
REM CRITICAL APPLICATIONS
|
||||
REM Xilinx products are not designed or intended to be fail-
|
||||
REM safe, or for use in any application requiring fail-safe
|
||||
REM performance, such as life-support or safety devices or
|
||||
REM systems, Class III medical devices, nuclear facilities,
|
||||
REM applications related to the deployment of airbags, or any
|
||||
REM other applications that could lead to death, personal
|
||||
REM injury, or severe property or environmental damage
|
||||
REM (individually and collectively, "Critical
|
||||
REM Applications"). Customer assumes the sole risk and
|
||||
REM liability of any use of Xilinx products in Critical
|
||||
REM Applications, subject only to applicable laws and
|
||||
REM regulations governing limitations on product liability.
|
||||
REM
|
||||
REM THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
|
||||
REM PART OF THIS FILE AT ALL TIMES.
|
||||
REM
|
||||
|
||||
REM-----------------------------------------------------------------------------
|
||||
REM Script to synthesize and implement the RTL provided for the clocking wizard
|
||||
REM-----------------------------------------------------------------------------
|
||||
|
||||
del \f results
|
||||
mkdir results
|
||||
cd results
|
||||
|
||||
planAhead -mode batch -source ..\planAhead_ise.tcl
|
||||
59
ipcore_dir/hdmi_clk/implement/planAhead_ise.sh
Executable file
59
ipcore_dir/hdmi_clk/implement/planAhead_ise.sh
Executable file
@@ -0,0 +1,59 @@
|
||||
#!/bin/sh
|
||||
# file: planAhead_ise.sh
|
||||
#
|
||||
# (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved.
|
||||
#
|
||||
# This file contains confidential and proprietary information
|
||||
# of Xilinx, Inc. and is protected under U.S. and
|
||||
# international copyright and other intellectual property
|
||||
# laws.
|
||||
#
|
||||
# DISCLAIMER
|
||||
# This disclaimer is not a license and does not grant any
|
||||
# rights to the materials distributed herewith. Except as
|
||||
# otherwise provided in a valid license issued to you by
|
||||
# Xilinx, and to the maximum extent permitted by applicable
|
||||
# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
|
||||
# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
|
||||
# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
|
||||
# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
|
||||
# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
|
||||
# (2) Xilinx shall not be liable (whether in contract or tort,
|
||||
# including negligence, or under any other theory of
|
||||
# liability) for any loss or damage of any kind or nature
|
||||
# related to, arising under or in connection with these
|
||||
# materials, including for any direct, or any indirect,
|
||||
# special, incidental, or consequential loss or damage
|
||||
# (including loss of data, profits, goodwill, or any type of
|
||||
# loss or damage suffered as a result of any action brought
|
||||
# by a third party) even if such damage or loss was
|
||||
# reasonably foreseeable or Xilinx had been advised of the
|
||||
# possibility of the same.
|
||||
#
|
||||
# CRITICAL APPLICATIONS
|
||||
# Xilinx products are not designed or intended to be fail-
|
||||
# safe, or for use in any application requiring fail-safe
|
||||
# performance, such as life-support or safety devices or
|
||||
# systems, Class III medical devices, nuclear facilities,
|
||||
# applications related to the deployment of airbags, or any
|
||||
# other applications that could lead to death, personal
|
||||
# injury, or severe property or environmental damage
|
||||
# (individually and collectively, "Critical
|
||||
# Applications"). Customer assumes the sole risk and
|
||||
# liability of any use of Xilinx products in Critical
|
||||
# Applications, subject only to applicable laws and
|
||||
# regulations governing limitations on product liability.
|
||||
#
|
||||
# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
|
||||
# PART OF THIS FILE AT ALL TIMES.
|
||||
#
|
||||
|
||||
#-----------------------------------------------------------------------------
|
||||
# Script to synthesize and implement the RTL provided for the clocking wizard
|
||||
#-----------------------------------------------------------------------------
|
||||
|
||||
rm -rf results
|
||||
mkdir results
|
||||
cd results
|
||||
|
||||
planAhead -mode batch -source ../planAhead_ise.tcl
|
||||
78
ipcore_dir/hdmi_clk/implement/planAhead_ise.tcl
Executable file
78
ipcore_dir/hdmi_clk/implement/planAhead_ise.tcl
Executable file
@@ -0,0 +1,78 @@
|
||||
# file: planAhead_ise.tcl
|
||||
#
|
||||
# (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved.
|
||||
#
|
||||
# This file contains confidential and proprietary information
|
||||
# of Xilinx, Inc. and is protected under U.S. and
|
||||
# international copyright and other intellectual property
|
||||
# laws.
|
||||
#
|
||||
# DISCLAIMER
|
||||
# This disclaimer is not a license and does not grant any
|
||||
# rights to the materials distributed herewith. Except as
|
||||
# otherwise provided in a valid license issued to you by
|
||||
# Xilinx, and to the maximum extent permitted by applicable
|
||||
# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
|
||||
# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
|
||||
# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
|
||||
# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
|
||||
# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
|
||||
# (2) Xilinx shall not be liable (whether in contract or tort,
|
||||
# including negligence, or under any other theory of
|
||||
# liability) for any loss or damage of any kind or nature
|
||||
# related to, arising under or in connection with these
|
||||
# materials, including for any direct, or any indirect,
|
||||
# special, incidental, or consequential loss or damage
|
||||
# (including loss of data, profits, goodwill, or any type of
|
||||
# loss or damage suffered as a result of any action brought
|
||||
# by a third party) even if such damage or loss was
|
||||
# reasonably foreseeable or Xilinx had been advised of the
|
||||
# possibility of the same.
|
||||
#
|
||||
# CRITICAL APPLICATIONS
|
||||
# Xilinx products are not designed or intended to be fail-
|
||||
# safe, or for use in any application requiring fail-safe
|
||||
# performance, such as life-support or safety devices or
|
||||
# systems, Class III medical devices, nuclear facilities,
|
||||
# applications related to the deployment of airbags, or any
|
||||
# other applications that could lead to death, personal
|
||||
# injury, or severe property or environmental damage
|
||||
# (individually and collectively, "Critical
|
||||
# Applications"). Customer assumes the sole risk and
|
||||
# liability of any use of Xilinx products in Critical
|
||||
# Applications, subject only to applicable laws and
|
||||
# regulations governing limitations on product liability.
|
||||
#
|
||||
# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
|
||||
# PART OF THIS FILE AT ALL TIMES.
|
||||
#
|
||||
|
||||
set projDir [file dirname [info script]]
|
||||
set projName hdmi_clk
|
||||
set topName hdmi_clk_exdes
|
||||
set device xc6slx9tqg144-2
|
||||
|
||||
create_project $projName $projDir/results/$projName -part $device
|
||||
|
||||
set_property design_mode RTL [get_filesets sources_1]
|
||||
|
||||
## Source files
|
||||
#set verilogSources [glob $srcDir/*.v]
|
||||
import_files -fileset [get_filesets sources_1] -force -norecurse ../../example_design/hdmi_clk_exdes.v
|
||||
import_files -fileset [get_filesets sources_1] -force -norecurse ../../../hdmi_clk.v
|
||||
|
||||
|
||||
#UCF file
|
||||
import_files -fileset [get_filesets constrs_1] -force -norecurse ../../example_design/hdmi_clk_exdes.ucf
|
||||
|
||||
set_property top $topName [get_property srcset [current_run]]
|
||||
|
||||
launch_runs -runs synth_1
|
||||
wait_on_run synth_1
|
||||
|
||||
set_property add_step Bitgen [get_runs impl_1]
|
||||
launch_runs -runs impl_1
|
||||
wait_on_run impl_1
|
||||
|
||||
|
||||
|
||||
58
ipcore_dir/hdmi_clk/implement/planAhead_rdn.bat
Executable file
58
ipcore_dir/hdmi_clk/implement/planAhead_rdn.bat
Executable file
@@ -0,0 +1,58 @@
|
||||
REM file: planAhead_rdn.sh
|
||||
REM
|
||||
REM (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved.
|
||||
REM
|
||||
REM This file contains confidential and proprietary information
|
||||
REM of Xilinx, Inc. and is protected under U.S. and
|
||||
REM international copyright and other intellectual property
|
||||
REM laws.
|
||||
REM
|
||||
REM DISCLAIMER
|
||||
REM This disclaimer is not a license and does not grant any
|
||||
REM rights to the materials distributed herewith. Except as
|
||||
REM otherwise provided in a valid license issued to you by
|
||||
REM Xilinx, and to the maximum extent permitted by applicable
|
||||
REM law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
|
||||
REM WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
|
||||
REM AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
|
||||
REM BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
|
||||
REM INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
|
||||
REM (2) Xilinx shall not be liable (whether in contract or tort,
|
||||
REM including negligence, or under any other theory of
|
||||
REM liability) for any loss or damage of any kind or nature
|
||||
REM related to, arising under or in connection with these
|
||||
REM materials, including for any direct, or any indirect,
|
||||
REM special, incidental, or consequential loss or damage
|
||||
REM (including loss of data, profits, goodwill, or any type of
|
||||
REM loss or damage suffered as a result of any action brought
|
||||
REM by a third party) even if such damage or loss was
|
||||
REM reasonably foreseeable or Xilinx had been advised of the
|
||||
REM possibility of the same.
|
||||
REM
|
||||
REM CRITICAL APPLICATIONS
|
||||
REM Xilinx products are not designed or intended to be fail-
|
||||
REM safe, or for use in any application requiring fail-safe
|
||||
REM performance, such as life-support or safety devices or
|
||||
REM systems, Class III medical devices, nuclear facilities,
|
||||
REM applications related to the deployment of airbags, or any
|
||||
REM other applications that could lead to death, personal
|
||||
REM injury, or severe property or environmental damage
|
||||
REM (individually and collectively, "Critical
|
||||
REM Applications"). Customer assumes the sole risk and
|
||||
REM liability of any use of Xilinx products in Critical
|
||||
REM Applications, subject only to applicable laws and
|
||||
REM regulations governing limitations on product liability.
|
||||
REM
|
||||
REM THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
|
||||
REM PART OF THIS FILE AT ALL TIMES.
|
||||
REM
|
||||
|
||||
REM-----------------------------------------------------------------------------
|
||||
REM Script to synthesize and implement the RTL provided for the XADC wizard
|
||||
REM-----------------------------------------------------------------------------
|
||||
|
||||
del \f results
|
||||
mkdir results
|
||||
cd results
|
||||
|
||||
planAhead -mode batch -source ..\planAhead_rdn.tcl
|
||||
57
ipcore_dir/hdmi_clk/implement/planAhead_rdn.sh
Executable file
57
ipcore_dir/hdmi_clk/implement/planAhead_rdn.sh
Executable file
@@ -0,0 +1,57 @@
|
||||
#!/bin/sh
|
||||
# file: planAhead_rdn.sh
|
||||
#
|
||||
# (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved.
|
||||
#
|
||||
# This file contains confidential and proprietary information
|
||||
# of Xilinx, Inc. and is protected under U.S. and
|
||||
# international copyright and other intellectual property
|
||||
# laws.
|
||||
#
|
||||
# DISCLAIMER
|
||||
# This disclaimer is not a license and does not grant any
|
||||
# rights to the materials distributed herewith. Except as
|
||||
# otherwise provided in a valid license issued to you by
|
||||
# Xilinx, and to the maximum extent permitted by applicable
|
||||
# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
|
||||
# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
|
||||
# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
|
||||
# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
|
||||
# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
|
||||
# (2) Xilinx shall not be liable (whether in contract or tort,
|
||||
# including negligence, or under any other theory of
|
||||
# liability) for any loss or damage of any kind or nature
|
||||
# related to, arising under or in connection with these
|
||||
# materials, including for any direct, or any indirect,
|
||||
# special, incidental, or consequential loss or damage
|
||||
# (including loss of data, profits, goodwill, or any type of
|
||||
# loss or damage suffered as a result of any action brought
|
||||
# by a third party) even if such damage or loss was
|
||||
# reasonably foreseeable or Xilinx had been advised of the
|
||||
# possibility of the same.
|
||||
#
|
||||
# CRITICAL APPLICATIONS
|
||||
# Xilinx products are not designed or intended to be fail-
|
||||
# safe, or for use in any application requiring fail-safe
|
||||
# performance, such as life-support or safety devices or
|
||||
# systems, Class III medical devices, nuclear facilities,
|
||||
# applications related to the deployment of airbags, or any
|
||||
# other applications that could lead to death, personal
|
||||
# injury, or severe property or environmental damage
|
||||
# (individually and collectively, "Critical
|
||||
# Applications"). Customer assumes the sole risk and
|
||||
# liability of any use of Xilinx products in Critical
|
||||
# Applications, subject only to applicable laws and
|
||||
# regulations governing limitations on product liability.
|
||||
#
|
||||
# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
|
||||
# PART OF THIS FILE AT ALL TIMES.
|
||||
#
|
||||
|
||||
#-----------------------------------------------------------------------------
|
||||
# Script to synthesize and implement the RTL provided for the XADC wizard
|
||||
#-----------------------------------------------------------------------------
|
||||
rm -rf results
|
||||
mkdir results
|
||||
cd results
|
||||
planAhead -mode batch -source ../planAhead_rdn.tcl
|
||||
69
ipcore_dir/hdmi_clk/implement/planAhead_rdn.tcl
Executable file
69
ipcore_dir/hdmi_clk/implement/planAhead_rdn.tcl
Executable file
@@ -0,0 +1,69 @@
|
||||
# file : planAhead_rdn.tcl
|
||||
#
|
||||
# (c) Copyright 2008 - 2011 Xilinx, Inc. All rights reserved.
|
||||
#
|
||||
# This file contains confidential and proprietary information
|
||||
# of Xilinx, Inc. and is protected under U.S. and
|
||||
# international copyright and other intellectual property
|
||||
# laws.
|
||||
#
|
||||
# DISCLAIMER
|
||||
# This disclaimer is not a license and does not grant any
|
||||
# rights to the materials distributed herewith. Except as
|
||||
# otherwise provided in a valid license issued to you by
|
||||
# Xilinx, and to the maximum extent permitted by applicable
|
||||
# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
|
||||
# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
|
||||
# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
|
||||
# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
|
||||
# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
|
||||
# (2) Xilinx shall not be liable (whether in contract or tort,
|
||||
# including negligence, or under any other theory of
|
||||
# liability) for any loss or damage of any kind or nature
|
||||
# related to, arising under or in connection with these
|
||||
# materials, including for any direct, or any indirect,
|
||||
# special, incidental, or consequential loss or damage
|
||||
# (including loss of data, profits, goodwill, or any type of
|
||||
# loss or damage suffered as a result of any action brought
|
||||
# by a third party) even if such damage or loss was
|
||||
# reasonably foreseeable or Xilinx had been advised of the
|
||||
# possibility of the same.
|
||||
#
|
||||
# CRITICAL APPLICATIONS
|
||||
# Xilinx products are not designed or intended to be fail-
|
||||
# safe, or for use in any application requiring fail-safe
|
||||
# performance, such as life-support or safety devices or
|
||||
# systems, Class III medical devices, nuclear facilities,
|
||||
# applications related to the deployment of airbags, or any
|
||||
# other applications that could lead to death, personal
|
||||
# injury, or severe property or environmental damage
|
||||
# (individually and collectively, "Critical
|
||||
# Applications"). Customer assumes the sole risk and
|
||||
# liability of any use of Xilinx products in Critical
|
||||
# Applications, subject only to applicable laws and
|
||||
# regulations governing limitations on product liability.
|
||||
#
|
||||
# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
|
||||
# PART OF THIS FILE AT ALL TIMES.
|
||||
#
|
||||
|
||||
set device xc6slx9tqg144-2
|
||||
set projName hdmi_clk
|
||||
set design hdmi_clk
|
||||
set projDir [file dirname [info script]]
|
||||
create_project $projName $projDir/results/$projName -part $device -force
|
||||
set_property design_mode RTL [current_fileset -srcset]
|
||||
set top_module hdmi_clk_exdes
|
||||
set_property top hdmi_clk_exdes [get_property srcset [current_run]]
|
||||
add_files -norecurse {../../../hdmi_clk.v}
|
||||
add_files -norecurse {../../example_design/hdmi_clk_exdes.v}
|
||||
import_files -fileset [get_filesets constrs_1 ] -force -norecurse {../../example_design/hdmi_clk_exdes.xdc}
|
||||
synth_design
|
||||
opt_design
|
||||
place_design
|
||||
route_design
|
||||
write_sdf -rename_top_module hdmi_clk_exdes -file routed.sdf
|
||||
write_verilog -nolib -mode timesim -sdf_anno false -rename_top_module hdmi_clk_exdes -file routed.v
|
||||
report_timing -nworst 30 -path_type full -file routed.twr
|
||||
report_drc -file report.drc
|
||||
write_bitstream -bitgen_options {-g UnconstrainedPins:Allow} -file routed.bit
|
||||
2
ipcore_dir/hdmi_clk/implement/xst.prj
Executable file
2
ipcore_dir/hdmi_clk/implement/xst.prj
Executable file
@@ -0,0 +1,2 @@
|
||||
verilog work ../../hdmi_clk.v
|
||||
verilog work ../example_design/hdmi_clk_exdes.v
|
||||
9
ipcore_dir/hdmi_clk/implement/xst.scr
Executable file
9
ipcore_dir/hdmi_clk/implement/xst.scr
Executable file
@@ -0,0 +1,9 @@
|
||||
run
|
||||
-ifmt MIXED
|
||||
-top hdmi_clk_exdes
|
||||
-p xc6slx9-tqg144-2
|
||||
-ifn xst.prj
|
||||
-ofn hdmi_clk_exdes
|
||||
-keep_hierarchy soft
|
||||
-equivalent_register_removal no
|
||||
-max_fanout 65535
|
||||
Reference in New Issue
Block a user